Partner: ERI, CEA, INBV, KATAM, ULUND, IFAG 

Conventional processor architectures use the load-store concept which results in compute performance being throttled by memory bandwidth limitations. SC2 will develop specialized forward-looking computing architectures which target the requirements of drones through the co-location of compute and memory, thus realizing efficient acceleration for perception and decision-making. This demonstrator will explore the performance efficiency advantages in a lab-environment, using synthetic traces and limited sensor data streams, within the requirements/specification envelope of selected use-cases.